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Fig. 7.14 Receiver samples half a bit time after transmitter sets the line state; this allows line to stabilize

Clearly, the frequency of the one and zero cycle determines the
frequency of the clock ticks and therefore the speed of the data
transmission. A frequency of 2400 clock ticks per second would give a
data rate of 2400 bps.

Circuit 114 Transmitter Signal Element Timing DCE source
(TSET-DCE)

This is the clock used for the Transmitted Data (circuit 103). It is used
only when synchronous data is being communicated between the two
devices.

The clock is generated by the DCE which means that the Transmitted
Data and its clock have different sources and travel in different directions.
The “Transmit” in the title refers to the data that the signal is clocking,
not to the direction of this signal.

As with circuit 115, the clock has equal zero and one periods, and the
zero-to-one transition marks the time at which the transmitter starts to
set the circuit state. The DCE then samples the state of circuit 103 half a
bit time later. It is important to appreciate that the DCE generates the
clock and triggers the DTE to generate the data bit. The DCE then samples
the bit half a bit time later.

Circuit 114 is the normal clock used for Transmitted Data; however,
circuit 113 can be used as an alternative.

Circuit 113 Transmitter Signal Element Timing DTE source
(TSET-DTE)
This circuit provides a clock for the Transmitted Data (circuit 103), and
is an alternative to circuit 114. The clock is generated by the DTE which
means that the Transmitted Data and its clock both have the same source
and travel in the same direction.

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